 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| ? semiconductor components industries, llc, 2012 march, 2012 ? rev. 4 1 publication order number: ncp361/d ncp361, ncv361 usb positive overvoltage protection controller with internal pmos fet and overcurrent protection the ncp361 disconnects systems at its output when wrong vbus operating conditions are detected at its input. the system is positive over ? voltage protected up to +20 v. thanks to an integrated pmos fet, no external device is necessary, reducing the system cost and the pcb area of the application board. the ncp361 is able to instantaneously disconnect the output from the input if the input voltage exceeds the overvoltage threshold (5.675 v). thanks to an overcurrent protection, the integrated pmos is turning off when the charge current exceeds current limit (see options in ordering information). the ncp361 provides a negative going flag (flag ) output, which alerts the system that voltage, current or overtemperature faults have occurred. in addition, the device has esd ? protected input (15 kv air) when bypassed with a 1 f or larger capacitor. features ? overvoltage protection up to 20 v ? on ? chip pmos transistor ? overvoltage lockout (ovlo) ? undervoltage lockout (uvlo) ? overcurrent protection ? alert flag output ? en enable pin ? thermal shutdown ? compliance to iec61000 ? 4 ? 2 (level 4) 8 kv (contact) 15 kv (air) ? esd ratings: machine model = b esd ratings: human body model = 2 ? udfn6 2x2 mm and tsop ? 5 3x3 mm packages ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? this is a pb ? free device applications ? usb devices ? mobile phones ? peripheral ? personal digital applications ? mp3 players ? set top boxes 6 pin udfn case 517ab pin connections http://onsemi.com marking diagrams (top view) in gnd flag en out q out xx m 1 1 2 3 6 5 4 1 5 1 xxx ayw xxx = specific device code m = date code a = assembly location y = year w = work week = pb ? free package (note: microdot may be in either location) tsop ? 5 case 483 in gnd en out flag 1 2 3 5 4 tsop ? 5 udfn ordering information see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
ncp361, ncv361 http://onsemi.com 2 figure 1. typical app lication circuit (udfn pinout) input flag r1 1m c1 1 f 25 v x5r 0603 output 1 2 j2 flag_state flag power in gnd out ncp361 flag c2 out 34 5 6 1 2 en 1 f 25 v x5r 0603 figure 2. functional block diagram input ldo v ref uvlo ovlo soft start output flagv (2 out pins in udfn package) thermal shutdown en pin function description udfn package) pin no. name type description 1 en input enable pin. the device enters in shutdown mode when this pin is tied to a high level. in this case the output is disconnected from the input. to allow normal functionality, the en pin shall be connected to gnd or to a i/o pin. this pin does not have an impact on the fault detection. 2 gnd power ground 3 in power input voltage pin. this pin is connected to the vbus. a 1 f low esr ceramic capacitor, or larger, must be connected between this pin and gnd. 4, 5 out output output voltage pin. the output is disconnected from the vbus power supply when the input voltage is above ovlo threshold or below uvlo threshold. a 1 f capacitor must be connected to these pins. the two out pins must be hardwired to common supply. 6 flag output fault indication pin. this pin allows an external system to detect a fault on vbus pin. the flag pin goes low when input voltage exceeds ovlo threshold. since the flag pin is open drain functionality, an external pull up resistor to v cc must be added. pin function description (tsop ? 5 package) pin no. name type description 1 in power input voltage pin. this pin is connected to the vbus. a 1 f low esr ceramic capacitor, or larger, must be connected between this pin and gnd. 2 gnd power ground 3 en input enable pin. the device enters in shutdown mode when this pin is tied to a high level. in this case the output is disconnected from the input. to allow normal functionality, the en pin shall be connected to gnd or to a i/o pin. this pin does not have an impact on the fault detection. 4 flag output fault indication pin. this pin allows an external system to detect a fault on vbus pin. the flag pin goes low when input voltage exceeds ovlo threshold. since the flag pin is open drain functionality, an external pull up resistor to v cc must be added. 5 out output output voltage pin. the output is disconnected from the vbus power supply when the input voltage is above ovlo threshold or below uvlo threshold. a 1 f capacitor must be connected to this pin. note: pin out provided for concept purpose only and might change in the final product ncp361, ncv361 http://onsemi.com 3 maximum ratings rating symbol value unit minimum v oltage (in to gnd) vmin in ? 0.3 v minimum v oltage (all others to gnd) vmin ? 0.3 v maximum voltage ( in to gnd) vmax in 21 v maximum voltage (all others to gnd) vmax 7.0 v maximum dc current from vin to vout (pmos) (note 1) imax 600 ma thermal resistance, junction ? to ? air tsop ? 5 udfn r ja 305 240 c/w operating ambient temperature range t a ? 40 to +85 c storage temperature range t stg ? 65 to +150 c junction operating temperature t j 150 c esd withstand v oltage (iec 61000 ? 4 ? 2) human body model (hbm), model = 2 (note 2) machine model (mm) model = b (note 3) vesd 15 air, 8.0 contact 2000 200 kv v v moisture sensitivity msl level 1 ? stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. with minimum pcb area. by decreasing r ja , the current capability increases. see pcb recommendation page 9. 2. human body model, 100 pf discharged through a 1.5 k resistor following specification jesd22/a114. 3. machine model, 200 pf discharged through all pins following specification jesd22/a115. ncp361, ncv361 http://onsemi.com 4 electrical characteristics (min/max limits values ( ? 40 c < t a < +85 c) and v in = +5.0 v. typical values are t a = +25 c, unless otherwise noted.) characteristic symbol conditions min typ max unit input voltage range v in 1.2 20 v undervoltage lockout threshold uvlo v in falls down uvlo threshold 2.85 3.0 3.15 v uvervoltage lockout hysteresis uvlo hyst 50 70 90 mv overvoltage lockout threshold ovlo v in rises up ovlo threshold 5.43 5.675 5.9 v overvoltage lockout hysteresis ovlo hyst 50 100 125 mv v in versus v out dopout v drop v in = 5 v, i charge = 500 ma 150 200 mv overcurrent limit i lim v in = 5 v 550 750 950 ma supply quiescent current idd no load, v in = 5.25 v 20 35 a standby current i std v in = 5 v, en = 1.2 v 26 37 a zero gate voltage drain current i dss v ds = 20 v, v gs = 0 v 0.08 a flag output low voltage vol flag v in > ovlo sink 1 ma on flag pin 400 mv flag leakage current flag leak flag level = 5 v 5.0 na en voltage high v ih v in from 3.3 v to 5.5 v 1.2 v en voltage low v il v in from 3.3 v to 5.5 v 0.55 v en leakage current en leak en = 5.5 v or gnd 170 na timings start up delay t on from v in > uvlo to v out = 0.8xv in , see fig 3 & 9 4.0 15 ms flag going up delay t start from v in > uvlo to flag = 1.2 v, see fig 3 & 10 3.0 s output turn off time t off from v in > ovlo to v out 0.3 v, see fig 4 & 11 v in increasing from 5 v to 8 v at 3 v/ s. no output capacitor. 0.7 1.5 s alert delay t stop from v in > ovlo to flag 0.4 v, see fig 4 & 12 v in increasing from 5 v to 8 v at 3 v/ s 1.0 s disable time t dis from en 0.4 to 1.2v to v out 0.3 v, see fig 5 & 13 v in = 4.75 v. no output capacitor. 3.0 s thermal shutdown t emperature t sd 150 c thermal shutdown hysteresis t sdhyst 30 c ncp361, ncv361 http://onsemi.com 5 1.2 v flag v out v in uvlo t start 0.8 v in t on ncp361, ncv361 http://onsemi.com 6 figure 9. start up. vin=ch1, v out=ch2 figure 10. flag going up delay. vin=ch1, fl:ag=ch3 figure 11. output t urn off time. vin=ch1, vout=ch2 figure 12. alert delay. vout=ch1, flag=ch3 figure 13. disable time. en=ch4, vin=ch1, vout=ch2 figure 14. thermal shutdown. vin=ch1, vout=ch2, flag=ch3 ncp361, ncv361 http://onsemi.com 7 typical operating characteristics figure 15. r ds(on) vs. temperature (load = 500 ma) figure 16. output short circuit figure 17. quiescent current vs. input voltage figure 18. overcurrent protection threshold vs. temperature figure 19. overcurrent protection threshold vs. input voltage r ds(on) (m ) temperature ( c) 0 50 100 150 200 250 300 0 50 100 150 ? 50 v in = 3.6 v v in = 5 v v in , input voltage (v) supply quiescent current ( a) 0 20 40 60 80 100 120 57 911 17 1 3 13 15 19 21 720 740 760 780 800 820 840 860 temperature ( c) overcurrent threshold (ma) v in = 5 v 050 ? 50 100 150 350 400 450 880 900 v in = 3.25 v 140 160 180 input voltage (v) 125 c 25 c ? 40 c 720 740 760 780 800 820 840 860 overcurrent threshold (ma) 3.5 4 3 4.5 5.5 880 900 125 c 25 c ? 40 c 5 v in = 3.6 v v in = 4.2 v v in = 5.25 v ? 25 c 0 c 85 c ncp361, ncv361 http://onsemi.com 8 operation ncp361 provides overvoltage protection for positive voltage, up to 20 v. a pmos fet protects the systems (i.e.: vbus) connected on the v out pin, against positive overvoltage. the output follows the vbus level until ovlo threshold is overtaken. undervoltage lockout (uvlo) to ensure proper operation under any conditions, the device has a built ? in undervoltage lock out (uvlo) circuit. during v in positive going slope, the output remains disconnected from input until v in voltage is above 3.0 v nominal. the flagv output is pulled to low as long as v in does not reach uvlo threshold. this circuit has a 70 mv hysteresis to provide noise immunity to transient condition. figure 20. output characteristic vs. v in v in (v) 20 v ovlo uvlo 0 v out ovlo uvlo 0 overvoltage lockout (ovlo) to protect connected systems on v out pin from overvoltage, the device has a built ? in overvoltage lock out (ovlo) circuit. during overvoltage condition (ovlo exceeds), the output remains disabled and flag is tied low, as long as the input voltage is higher than ovlo ? hysteresis. this circuit has a 100 mv hysteresis to provide noise immunity to transient conditions . overcurrent protection (ocp) the ncp361 integrates overcurrent protection to prevent system/battery overload or defect. the current limit threshold is internally set at 750 ma. this value can be changed from 150 ma to 750 ma by a metal tweak, please contact your on semiconductor representative for availability. during current fault, the internal pmos fet is automatically turned off (5 s) if the charge current exceeds i lim . ncp361 goes into turn on and turn off mode as long as defect is present. the internal ton delay (4 ms typical) allows limiting thermal dissipation. the flag pin goes to low level when an overcurrent fault appears. that allows the microcontroller to count defect events and turns off the pmos with en pin. figure 21. overcurrent event example i lim t on v out i load overload retrieve normal operation flag output ncp361 provides a flag output, which alerts external systems that a fault has occurred. this pin is tied to low as soon as: 1.2 v < v in < uvlo, v in > ovlo, i charge > i limit , t j > 150 c. when ncp361 recovers normal condition, flag is held high. the pin is an open drain output, thus a pull up resistor (typically 1 m ? minimum 10 k ) must be provided to v cc . flag pin is an open drain output. en input to enable normal operation, the en pin shall be forced to low or connected to ground. a high level on the pin disconnects out pin from in pin. en does not overdrive an ovlo or uvlo fault. internal pmos fet the ncp361 includes an internal pmos fet to protect the systems, connected on out pin, from positive overvoltage. regarding electrical characteristics, the r ds(on) , during normal operation, will create low losses on v out pin, characterized by v in versus v out dropout. esd tests the ncp361 fully supports the iec61000 ? 4 ? 2, level 4 (input pin, 1 f mounted on board). that means, in air condition, v in has a 15 kv esd protected input. in contact condition, v in has 8 kv esd protected input. please refer to figure 22 to see the iec61000 ? 4 ? 2 electrostatic discharge waveform. ncp361, ncv361 http://onsemi.com 9 figure 22. pcb recommendations the ncp361 integrates a 500 ma rated pmos fet, and the pcb rules must be respected to properly evacuate the heat out of the silicon. the udfn p ad1 must be connected to ground plane to increase the heat transfer if necessary from an application standpoint. of course, in any case, this pad shall be not connected to any other potential. by increasing pcb area, the r ja of the package can be decreased, allowing higher charge current to fill the battery. taking into account that internal bondings (wires between package and silicon) can handle up to 1 a (higher than thermal capability), the following calculation shows two different example of current capability, depending on pcb area: ? with 305 c/w (without pcb area), allowing dc current is 500 ma ? with 260 c/w (200 mm 2 ), the charge dc current allows with a 85 c ambient temperature is: i = (t j -t a )/(r ja x r dson ) i = 625 ma in every case, we recommend to make thermal measurement on final application board to make sure of the final thermal resistance. 80 130 180 230 280 330 380 0 100 200 300 400 500 600 700 copper heat spreader area (mm^2) theta ja (c/w) 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% 50% % delta dfn vs tsop ? 5 tsop ? 5 1.0 oz tsop ? 5 2.0 oz dfn 2x2.2 1.0 oz dfn 2x2.2 2.0 oz % delta dfn vs tsop ? 5 figure 23. thermal resistance of udfn 2x2 and tsop packages as a function of pcb area and thickness ncp361, ncv361 http://onsemi.com 10 ordering information device marking package shipping ? ncp361mutbg ad udfn6 (pb ? free) 3000 / t ape & reel ncp361snt1g acd tsop ? 5 (pb ? free) 3000 / tape & reel NCV361SNT1G* vet tsop ? 5 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d. *ncv prefix for automotive and other applications requiring unique site and control change requirements selection guide the ncp361 can be available in several undervoltage and overvoltage thresholds versions. part number is designated as follows: a ncp361xxxxxtxg bc e d code contents a overcurrent threshold ? : 750 ma b package mu: udfn sn: tsop ? 5 c uvlo typical threshold ? : 3.00 v d ovlo typical threshold ? : 5.675 v e tape & reel type b: = 3000 1: = 3000 note: additional current limit, uvlo and ovlo can be available. please contact your on semiconductor representative for availability. ncp361, ncv361 http://onsemi.com 11 package dimensions udfn6 2x2, 0.65p case 517ab issue b *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* 0.47 0.40 0.65 1.70 2.30 1 dimensions: millimeters 6x 0.95 pitch 6x notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d b e 0.10 c a3 a a1 2x 2x 0.10 c dim a min max millimeters 0.45 0.55 a1 0.00 0.05 a3 0.127 ref b 0.25 0.35 d 2.00 bsc d2 1.50 1.70 0.80 1.00 e 2.00 bsc e2 e 0.65 bsc k 0.25 0.35 l pin one reference 0.08 c 0.10 c 6x a 0.10 c l e e2 b b 3 6 6x 1 k 4 6x 6x 0.05 c 4x d2 bottom view 0.20 --- ncp361, ncv361 http://onsemi.com 12 package dimensions tsop ? 5 case 483 ? 02 issue g notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. 5. optional construction: an additional trimmed lead is allowed in this location. trimmed lead not to extend more than 0.2 from body. dim min max millimeters a 3.00 bsc b 1.50 bsc c 0.90 1.10 d 0.25 0.50 g 0.95 bsc h 0.01 0.10 j 0.10 0.26 k 0.20 0.60 l 1.25 1.55 m 0 10 s 2.50 3.00 123 54 s a g l b d h c j 0.7 0.028 1.0 0.039 mm inches scale 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* 0.20 5x c ab t 0.10 2x 2x t 0.20 note 5 t seating plane 0.05 k m detail z detail z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ncp361/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca sales representative |
Price & Availability of NCV361SNT1G
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |